Computer Organization and Architecture
Computer Organization and Architecture. Instructor: Prof. V. Kamakoti, Department of Computer Science and Engineering, IIT Madras. Computer Architecture talks about the basic digital hardware with which the processor is built and Computer Organization talks about the basic interface the digital hardware gives to the compiler and the operating systems to support the user demands. Study of Application Binary Interface is the subject matter of Computer Organization. How these functionalities are actually implemented is the subject matter of Computer Architecture. This course not only addresses the how and what but also the whys of Computer Architecture and Organization. In this course, Computer Architecture will be dealt in theory and Computer Organization using lab classes.
(from nptel.ac.in)
Go to the Course Home or watch other lectures:
| Lecture 01 - Introduction, High Speed Circuit Design - Recursive Doubling |
| Lecture 02 - High Speed Circuit Design - Fast Adder Circuits |
| Lecture 03 - Lab 1: Introduction |
| Lecture 04 - Fast Addr Circuits (cont.) |
| Lecture 05 - Fast Multiplier Circuit |
| Lecture 06 - Fast Multiplier Circuit (cont.) |
| Lecture 07 - Programming using x86 ISA - Addressing Modes |
| Lecture 08 - Programming using x86 ISA - Addressing Modes (cont.) |
| Lecture 09 - Floating Point Arithmetic - Precision and Accuracy |
| Lecture 10 - Floating Point Arithmetic - Addition, Subtraction and Multiplication |
| Lecture 11 - Instruction Set Architecture |
| Lecture 12 - Instruction Set Architecture (cont.) |
| Lecture 13 - Lab 2: Segmentation |
| Lecture 14 - Lab 2: Segmentation (cont.) |
| Lecture 15 - Lab 2: Segmentation (cont.) |
| Lecture 16 - Orthogonal ISA, C Constructs Mapping, Addressing Modes |
| Lecture 17 - Atomic and Predicated Instructions |
| Lecture 18 - Atomic and Predicated Instructions (cont.) |
| Lecture 19 - General Purpose Registers |
| Lecture 20 - Expanding Opcodes |
| Lecture 21 - Introduction to Pipelining |
| Lecture 22 - Pipelining |
| Lecture 23 - Data Hazards |
| Lecture 24 - Lab 2: Instruction Scheduling - Static and Dynamic |
| Lecture 25 - Dynamic Instruction Scheduling |
| Lecture 26 - Dynamic Instruction Scheduling (cont.) |
| Lecture 27 - Control Hazard, Branch Prediction |
| Lecture 28 - Process Management |
| Lecture 29 - Branch Prediction |
| Lecture 30 - Global Branch Prediction |
| Lecture 31 - Structural Hazard, Architectural Enhancements |
| Lecture 32 - Lab 3: Virtual Memory |
| Lecture 33 - Locality of Reference, Demand Paging |
| Lecture 34 - Page Replacement Algorithm |
| Lecture 35 - Multilevel Paging, Translational Lookaside Buffer |
| Lecture 36 - Multilevel Paging |
| Lecture 37 - Multilevel Paging (cont.) |
| Lecture 38 - Page Frame Allocation, Belady's Anomaly |
| Lecture 39 - Paging, Cache |
| Lecture 40 - Cache |
| Lecture 41 - Cache Organization |
| Lecture 42 - Cache - Cache Coherency, Dual Ported Cache |
| Lecture 43 - Multilevel Caching, Multitasking |
| Lecture 44 - Cache, Degree of Multiprogramming |
| Lecture 45 - Shared Memory Architecture |
| Lecture 46 - Shared Memory Architecture (cont.) |
| Lecture 47 - Virtually Indexed, Virtually Tagged and Physically Tagged Caches |
| Lecture 48 - Lab 4: Task Switching |
| Lecture 49 - Shared Memory Architecture, Cache Coherence |
| Lecture 50 - Concurrent Programming in Hardware |
| Lecture 51 - Concurrent Programming in Hardware (cont.) |
| Lecture 52 - Conclusion: Recent Trends in Computer Organization and Architecture |